1/9 march 2005 stW45NM50 n-channel 550v @ tjmax - 0.08 ? - 45a to-247 mdmesh? mosfet table 1: general features typical r ds (on) = 0.08 ? high dv/dt and avalanche capabilities 100% avalanche tested low input capacitance and gate charge low gate input resistance tight process control and high manufacturing yields description the mdmesh? is a new revolutionary mosfet technology that associates the multiple drain pro- cess with the company?s powermesh? horizon- tal layout. the resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. the adoption of the company?s proprietary strip tech- nique yields overall dynamic performance that is significantly better than that of similar competi- tion?s products. applications the mdmesh? family is very suitable for increas- ing power density of high voltage converters allow- ing system miniaturization and higher efficiencies. table 2: order codes figure 1: package figure 2: internal schematic diagram type v dss ( @ tjmax) r ds(on) i d stW45NM50 550v < 0.1 ? 45 a 1 2 3 to-247 sales type marking package packaging stW45NM50 W45NM50 to-247 tube rev. 2
stW45NM50 2/9 table 3: absolute maximum ratings (*)pulse width limited by safe operating area (1)i sd 45a, di/dt 400a/s, v dd v (br)dss , t j t jmax. table 4: thermal data table 5: avalanche characteristics electrical characteristics (t case =25 c unless otherwise specified) table 6: on/off symbol parameter value unit v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25 c 45 a i d drain current (continuous) at t c = 100 c 28.4 a i dm ( * ) drain current (pulsed) 180 a p tot total dissipation at t c = 25 c 417 w derating factor 2.08 w/ c dv/dt (1) peak diode recovery voltage slope 15 v/ns t stg storage temperature ? 65 to 150 c t j max. operating junction temperature 150 c rthj-case thermal resistance junction-case max 0.3 c/w rthj-amb thermal resistance junction-ambient max 30 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 20 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 35 v) 810 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 500 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 10 a v ds = max rating, t c = 125 c 100 a i gss gate-body leakage current (v ds = 0) v gs = 30 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 345v r ds(on) static drain-source on resistance v gs = 10 v, i d = 22.5 a 0.08 0.1 ?
3/9 stW45NM50 electrical characteristics (continued) table 7: dynamic table 8: source drain diode (2) pulsed: pulse duration = 300 s, duty cycle 1.5 %. (3) c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss . symbol parameter test conditions min. typ. max. unit g fs (2) forward transconductance v ds > i d(on) x r ds(on)max, i d = 22.5a 20 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 3700 610 80 pf pf pf c oss eq. (3) equivalent output capacitance v gs = 0v, v ds = 0v to 400v 325 pf r g gate input resistance f=1 mhz gate dc bias = 0 test signal level = 20mv open drain 1.7 ? t d(on) t r turn-on delay time rise time v dd = 250v, i d = 24 a r g =4.7 ? v gs = 10 v (see figure 14) 40 35 ns ns t d(off) t f t c turn-off delay time fall time cross-over time v dd = 400 v, i d = 45 a, r g = 4.7 ?, v gs = 10 v (see figure 14) 18 23 44 ns ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 400v, i d = 45 a, v gs = 10v (see figure 18) 87 23 42 11 7 n c nc nc symbol parameter test conditions min. typ. max. unit i sd source-drain current 45 a i sdm (3) source-drain current (pulsed) 180 a v sd (2) forward on voltage i sd = 45 a, v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 40 a, di/dt = 100a/s, v dd = 100 v, t j = 25 c (see figure 16) 520 7.8 30 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 40 a, di/dt = 100a/s, v dd = 100 v, t j = 150 c (see figure 16) 680 11.2 33 ns c a
stW45NM50 4/9 figure 3: safe operating area figure 4: output characteristics figure 5: transconductance figure 6: thermal impedance figure 7: transfer characteristics figure 8: static drain-source on resistance
5/9 stW45NM50 figure 9: gate charge vs gate-source voltage figure 10: normalized gate thereshold volt- age vs temperature figure 11: source-drain diode forward char- acteristics figure 12: capacitance variations figure 13: normalized on resistance vs tem- perature
stW45NM50 6/9 figure 14: unclamped inductive load test cir- cuit figure 15: switching times test circuit for resistive load figure 16: test circuit for inductive load switching and diode recovery times figure 17: unclamped inductive wafeform figure 18: gate charge test circuit
7/9 stW45NM50 dim. mm. inch min. typ max. min. typ. max. a 4.85 5.15 0.19 0.20 a1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 b2 3.0 3.40 0.118 0.134 c 0.40 0.80 0.015 0.03 d 19.85 20.15 0.781 0.793 e 15.45 15.75 0.608 0.620 e5.45 0.214 l 14.20 14.80 0.560 0.582 l1 3.70 4.30 0.14 0.17 l2 18.50 0.728 ? p 3.55 3.65 0.140 0.143 ? r 4.50 5.50 0.177 0.216 s5.50 0.216 to-247 mechanical data
stW45NM50 8/9 table 9: revision history date revision description of changes 30/mar/2005 2 modified value in table 7
9/9 stW45NM50 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america
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